The operating frequency of processors and other digital integrated circuits has continued to increase, reaching the Gigahertz range in recent years. As the frequency has increased, the delay attributable to the clocked state elements used to store state at the clock cycle boundaries has grown to a larger percentage of the clock cycle time. Accordingly, the amount of time available to do “useful work” has decreased.
The term “flop” is used to refer to one type of clocked state element. A flop is typically an edge-triggered clocked storage device. That is, the flop captures a value responsive to a clock edge (e.g. the rising or falling edge), and stores the value in steady state until the next edge causes a new value to be captured. In complex circuits, many flops may be present in a single logical path, introducing delay and often necessitating output buffers in between flops and logical stages.